Optimized for eUSCI and USCI modules on MSP430 microcontrollers.
Example: 1048576 for 1.048MHz DCO or 32768 for ACLK
Disabled (Low-frequency Mode)
Enabled (High-frequency Mode / Oversampling)
Use Enabled if BRCLK / Baud Rate > 16 for better error reduction.
Calculated Settings
Prescaler (UCBRx):
First Modulator (UCBRFx):
Second Modulator (UCBRSx):
Theoretical Error:
How MSP430 Baud Rate Calculation Works
Configuring UART for Texas Instruments MSP430 microcontrollers requires setting three specific registers within the eUSCI or USCI module to minimize bit timing errors. The calculation depends on whether you use Low-frequency mode or Oversampling mode.
1. Determine the Clock Source (BRCLK)
The BRCLK is usually sourced from SMCLK (Sub-main clock) for high speeds or ACLK (Auxiliary clock) for low-power operation. Common frequencies include 32,768 Hz (watch crystal) or 1 MHz, 8 MHz, and 16 MHz from the internal DCO.
2. Oversampling Mode (UCOS16 = 1)
This is recommended when the ratio of BRCLK to the baud rate is 16 or higher. It reduces errors by sampling the incoming bit 16 times.
N = BRCLK / Baud Rate
UCBRx = floor(N / 16)
UCBRFx = floor(((N / 16) – UCBRx) * 16)
3. Low-frequency Mode (UCOS16 = 0)
Use this mode when the ratio is less than 16 or when operating at very low clock frequencies (like ACLK at 32kHz for 9600 baud).
N = BRCLK / Baud Rate
UCBRx = floor(N)
UCBRSx is chosen from a lookup table based on the fractional part of N to minimize cumulative timing error.
Example Calculation
If BRCLK = 1,048,576 Hz and target Baud Rate = 9600 bps: